Field of the Invention
This invention relates to a processor, and more particularly to an improvement of array processors used to perform digital signal processing for image signals.
Conventional array processors of this type for digitally processing image signals include serial video processors (SVP) (see "SVP: Serial Video Processor", IEEE 1990 Custom Integrated Circuits Conference, p17.3.1). These processors have 1,024 one-bit processor elements in a one-dimensional arrangement which constitutes a single instruction multiple data (SIMD) architecture. The SIMD method is a method for executing the same operation on a plurality of computing elements and data by a single instruction in the same flow.
Multiplication is important as a logical operation for processor elements used for digital signal processing. In particular, linear array processors that use one-bit processor elements to process image signals must finish signal processing for a single line within one horizontal feedback time period.
However, currently used one-bit processor elements require many steps for multiplication; a one-bit processor capable of multiplication with fewer steps is desired.